Light-emitting diodes are important solid state devices that convert electrical power to light output. For light-emitting diodes based on Gallium nitride (GaN), the light may be generated from an active region which is “sandwiched” between a p-doped layer and an n-doped layer. Light-emitting diodes could be classified into diodes having a conventional horizontal structured device architecture and diodes having a vertical structured device architecture. In the conventional horizontal structured diodes, parts of the device may be covered by both p-electrode and n-electrode, which may reduce the lighting emitting area and light extraction efficiency, and which may also lead to current crowding problem, especially at high operating current regime. On the contrary, the vertical structured diode has several advantages in comparison with the horizontal structured diode. Typically, for the vertical structured diodes, the p-electrode and the n-electrode are fabricated separately on the top and the bottom of the device. Such electrode arrangement may increase the emitting area and may also reduce the current crowding effect. Moreover, the vertical structured diode could be bonded or attached to a conductive carrier (e.g. metal or silicon), which is beneficial to the thermal management and current spreading.
FIG. 1 is a schematic 100 illustrating a typical vertical structured light-emitting diode where an “epitaxial layer stack” 102 includes an p-doped GaN layer 102a, and a n-doped GaN layer 102c separated by the multiple-quantum wells (MQWs) layer 102b. The device is typically grown on a selected carrier (removed during process, not shown in FIG. 1) such as sapphire (Al2O3), silicon (Si), silicon carbide (SiC), and gallium nitride (GaN). A reflective layer 104 is deposited on the surface of the p-doped layer 102a. The reflective layer 104 serves as both the ohmic contact layer and the light reflection layer. The sidewall of the device is protected by a passivation layer 110, such as silicon oxide or photoresist. A conductive carrier 108 is plated by electroplating method on a seed layer 106. An n-electrode 112 is deposited as the contact electrode of the n-doped layer 102c. The position for the n-electrode 112 may be on the top surface or in the middle of the n-doped layer 102c. The surface of the n-doped layer 102c is treated by wet chemical etching method or dry etching method for surface texturing.
In the typical structure design of vertical structured GaN-based light-emitting diodes, the n-electrode 112 is patterned by the method of photolithography on the top surface of the n-doped layer 102c. The n-electrode 112 consists of metal stacks and is light-blocking, which leads to loss of light emitting from the MQWs layer 102b. Moreover, the current spreading is restricted by the conductivity of the n-electrode 112 layout, which may lead to efficiency drop, especially in the high current density regime.